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FPGA Implementation and Optimization of Jet Resolution-Based MET Correction and PUPPI MET Algorithms at the CMS Phase-II Level-1 Trigger

  • 오준원 (Junwon Oh, 경희대학교 대학원)

초록/요약

CERN is preparing for the High Luminosity Large Hadron Collider (HL-LHC), which will achieve proton-proton collisions at 14 TeV with significantly increased instantaneous luminosity. The HL-LHC will enable more precise measurements of the Standard Model (SM) and enhance searches for physics beyond the SM. This increase in luminosity will result in a higher number of pileup interactions per event, posing new challenges for data processing and event selection. To handle the increased data rates and pileup, the CMS Level-1 Trigger system must be upgraded to deliver faster and more efficient event selection. One of the major upgrades is the Correlator Trigger Layer (CTL), designed to aggre- gate particle data from various CMS detector components. The CTL processes Particle Flow (PF) and Pileup Per Particle Identification (PUPPI) candidates and implements cru- cial algorithms such as Tagging Algorithms, Jet Finding, and Missing Transverse Energy (MET) calculations at the Level-1 Trigger stage. The CTL must operate with low latency and high precision to ensure optimal performance under the demanding conditions of the HL-LHC. This thesis focuses on optimizing two key algorithms for implementation on the L1 Trig- ger boards, specifically the APx and Serenity platforms: the MET Algorithm and the Jet Resolution-based Corrected MET Algorithm. The MET algorithm optimization includes reducing latency by exploring alternative approaches to trigonometric function calcula- tions, such as Look-Up Tables (LUT) and Polynomial Interpolation. The Jet Resolution- based Corrected MET Algorithm is designed to improve MET precision by accounting for jet uncertainties in real-time. The thesis also discusses the resource usage, latency, and performance improvements resulting from these optimizations, emphasizing how the en- hanced algorithms improve the overall efficiency and accuracy of the CMS Level-1 Trigger system in preparation for the HL-LHC.

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목차

1 Introduction 1
2 Theoretical Background 5
2.1 The standard model 5
2.2 Quantum Chromodynamics (QCD) 6
2.3 The electroweak interaction 7
2.4 Beyond the Standard Model 8
3 The Large Hadron Collider and the Compact Muon Solenoid Experiment 10
3.1 The Large Hadron Collider (LHC) 10
3.1.1 LHC Detectors 11
3.1.2 The High-Luminosity LHC (HL-LHC) 12
3.2 The Compact Muon Solenoid detector (CMS) 14
3.2.1 Tracker 14
3.2.2 Electromagnetic Calorimeter 15
3.2.3 Hadronic Calorimeter 15
3.2.4 Muon System 16
3.2.5 Triggering and data acquistion 16
3.2.6 The CMS Phase-II Upgrade 17
3.3 Physics at LHC 18
3.3.1 Hadron collisions 18
3.3.2 Jet finding 19
3.3.3 Missing Transverse Energy (MET, pTmiss ) 21
3.3.4 PileUp Per Particle Identification (PUPPI) 22
4 CMS Phase-II Level-1 Correlator Trigger Layer 23
4.1 Introduction to Correlator Trigger layer 23
4.2 Field Programmable Gate Arrays (FPGA) 24
4.2.1 Hardware Description Language (HDL) 26
4.2.2 High-Level Synthesis (HLS) 27
4.3 Correlator Trigger Boards and Firmware 28
4.3.1 Board Firmware 28
4.3.2 APx Board 29
4.3.3 Serenity Board 31
5 PUPPI MET Algorithm in Level-1 Trigger 33
5.1 Level-1 MET Algorithm 33
5.2 Optimization of trigonometric function 35
5.2.1 CORDIC 36
5.2.2 Look-Up Table (LUT) 37
5.2.3 Polynomial Interpolation 38
5.3 Benchmark, Resource Usage and Board Implementation 39
5.3.1 Benchmarking and Algorithm Selection 39
5.3.2 Board Firmware and Testbench 41
5.3.3 Full Implementation and Timing Verification 41
6 Jet Resolution-Based MET Correction Algorithm 44
6.1 Type-I Correction 44
6.2 MET Significance 45
6.3 Jet Resolution at Level-1 and MET Correction 47
6.4 Physics Performance 49
6.5 Resource Usage and Board Implementation 53
6.5.1 Resource Utilization and Latency Analysis 53
6.5.2 Full Implementation and Timing Verification 53
7 Conclusions 56

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